MI300X
跳到导航
跳到搜索
| Specification | Details |
|---|---|
| Integrated CPU+GPU Package | Yes |
| Target Market | Exascale Supercomputer Market |
| Transistors | 153 Billion |
| Zen 4 Cores | Up to 24 |
| GPU Architecture | CDNA 3 |
| Memory | Up to 128 GB HBM3 |
| Chiplets + Memory Stacks | Up to 6 Chiplets + 8 Memory Stacks (5nm + 6nm process) |
| Sampling | Now |
| Ramp | Q4 2023 |
| Infinity Cache and 4th Gen Infinity Architecture | Yes |
| Unified Memory APU Architecture and New Math Formats | Yes |
| Performance per Watt Uplift over CDNA 2 | 5x |
| AI Performance versus CDNA 2-based Instinct MI250X | Over 8x |
| CDNA 4 Compute Units | Up to 228 |
| Socket Compatibility | SH5 |
| Specification | Details |
|---|---|
| Integrated CPU+GPU Package | No |
| Target Market | Exascale Supercomputer Market |
| Transistors | 153 Billion |
| Zen 4 Cores | 0 |
| GPU Architecture | CDNA 3 |
| Memory | Up to 192 GB HBM3 |
| Chiplets + Memory Stacks | Up to 8 Chiplets + 8 Memory Stacks (5nm + 6nm process) |
| Sampling | Q3 2023 |
| Ramp | Q4 2023 |
| Infinity Cache and 4th Gen Infinity Architecture | Yes |
| Unified Memory APU Architecture and New Math Formats | No |
| Performance per Watt Uplift over CDNA 2 | Not specified |
| AI Performance versus CDNA 2-based Instinct MI250X | Not specified |
| CDNA 4 Compute Units | Up to 304 |
| Socket Compatibility | SH5 |