Ascend910系列:修订间差异
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Architecture of Ascend 910 Chips | |||
[[Image:Huawei-Ascend-910-AI-Training-Chip-Block-Diagram.jpg|700px]] | [[Image:Huawei-Ascend-910-AI-Training-Chip-Block-Diagram.jpg|700px]] | ||
Main features: | |||
1. The Huawei Ascend 910 has 32 DaVinci AI cores. | |||
2. The chip combines these DaVinci AI cores with high-speed HBM2 memory. | |||
3. The main chip also has additional logic blocks such as 128 channel video decoding engines. | |||
4. There is a Nimbus V3 chip that handles most of the I/O and is co-packaged alongside the main chip and the HBM2 stacks. | |||
5. The Huawei Ascend 910 is designed to run at a higher power envelope (350W) and higher performance compared to the Ascend 310. | |||
6. Huawei claims 256 TFLOPs of FP16 performance for the Ascend 910. | |||
7. The Tesla V100 has 112-125 TFLOPs for deep learning thanks to its tensor cores. |
2023年11月3日 (五) 14:12的版本
Architecture of Ascend 910 Chips
Main features: 1. The Huawei Ascend 910 has 32 DaVinci AI cores. 2. The chip combines these DaVinci AI cores with high-speed HBM2 memory. 3. The main chip also has additional logic blocks such as 128 channel video decoding engines. 4. There is a Nimbus V3 chip that handles most of the I/O and is co-packaged alongside the main chip and the HBM2 stacks. 5. The Huawei Ascend 910 is designed to run at a higher power envelope (350W) and higher performance compared to the Ascend 310. 6. Huawei claims 256 TFLOPs of FP16 performance for the Ascend 910. 7. The Tesla V100 has 112-125 TFLOPs for deep learning thanks to its tensor cores.